54LCX245 Datasheet | National Semiconductor

Description The LCX245 contains eight non-inverting bidirectional buffers with TRI-STATE™ outputs and is intended for bus oriented applications. The device is designed for low voltage (3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines the direction of data flow through the device. The OE input disables both the A and B ports by placing them in a high impedance state. The LCX245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Features n n n n n n n n n 5V tolerant inputs and outputs 9ns t PD max, 10µA ICCQ max Power down high impedance inputs and outputs Supports live insertion/withdrawal 2.0V- 3.6V VCC supply operation ± 24 m A output drive Implements patented noise/EMI reduction circuitry Functionally patible with the 54 series 245 ESD performance: Human body model > 2000V Machine model > 200V n Standard Microcircuit Drawing (SMD) 5962-97543 Logic Symbols Connection Diagram Pin Assignment for DIP and Cerpack DS101022-1 Pin Descriptions Pin Names OE T/R A0- A7 B0- B7 Description Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs DS101022-3 Pin Assignment for LCC DS101022-6 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS101022 .national. Truth Table Inputs OE L L H T/R L H X Bus B0- B7 Data to Bus A0- A7 Bus A0- A7 Data to Bus B0- B7 HIGH Z State on A0- A7, B0- B7 (Note 1) Outputs H = High Voltage Level L = Low Voltage Level X = Immaterial Z = High Impedance Note 1: Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram DS101022-4 .national. Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Voltage...