74ACT899 Datasheet | National Semiconductor

Description The ’AC ’ACT899 is a 9-bit to 9-bit parity transceiver with transparent latches The device can operate as a feedthrough transceiver or it can generate check parity from the 8-bit data busses in either direction The ’AC ’ACT899 fea.. tures independent latch enables for the A-to-B direction and the B-to-A direction a select pin for ODD EVEN parity and separate error signal output pins for checking parity Features Y Y Y Y Y Latchable transceiver with output sink of 24 m A Option to select generate parity and check or ‘‘feedthrough’’ data parity in directions A-to-B or B-to-A Independent latch enable for A-to-B and B-to-A directions Select pin for ODD EVEN parity ERRA and ERRB output pins for parity checking Ability to simultaneously generate and check parity May be used in system applications in place of the ’280 May be used in system applications in place of the ’657 and ’373 (no need to change T R to check parity) 4 k V minimum ESD immunity Logic Symbol Connection Diagram Pin Assignment for PCC and LCC TL F 10637 - 1 TL F 10637 - 2 TRI-STATE is a registered trademark of National Semiconductor Corporation FACTTM is a trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 10637 RRD-B30M75 Printed in U S A Pin Names A 0 - A7 B 0 - B7 APAR BPAR ODD EVEN GBA GAB SEL Description A Bus Data Inputs Data Outputs B Bus Data Inputs Data Outputs A and B Bus Parity Inputs ODD EVEN Parity Select Active LOW for EVEN Parity Output Enables for A or B Bus Active LOW Select Pin for Feed-Through or Generate Mode LOW for Generate Mode Latch Enables for A and B Latches HIGH for Transparent Mode Error Signals for Checking Generated Parity with Parity In LOW if Error Occurs Functional Description The ’AC ’ACT899 has three principal modes of operation which are outlined below These modes apply to both the Ato-B and B-to-A directions Bus A (B) municates to Bus B (A) parity is generated and passed on to the B (A) Bus as...