74C922 Datasheet | National Semiconductor

Description These CMOS key encoders provide all the necessary logic to fully encode an array of SPST switches The keyboard scan can be implemented by either an external clock or external capacitor These encoders also have on-chip pullup devices which permit switches with up to 50 k X on resistance to be used No diodes in the switch array are needed to eliminate ghost switches The internal debounce circuit needs only a single external capacitor and can be defeated by omitting the capacitor A Data Available output goes to a high level when a valid keyboard entry has been made The Data Available output returns to a low level when the entered key is released even if another key is depressed The Data Available will return high to indicate acceptance of the new key after a normal debounce period this two-key rollover is provided between any two switches An internal register remembers the last key pressed even after the key is released The TRI-STATE outputs provide for easy expansion and bus operation and are LPTTL patible Features Y Y Y Y Y Y Y Y Y 50 k X maximum switch on resistance On or off chip clock On-chip row pull-up devices 2 key roll-over Keybounce elimination with single capacitor Last key register at outputs TRI-STATE outpust LPTTL patible Wide supply range Low power consumption 3V to 15V Connection Diagrams Pin Assignment for Dual-In-Line Package Pin Assignment for SOIC Pin Assignment for DIP and SOIC Package TL F 6037 - 14 Top View TL F 6037- 1 Order Number MM74C922 TL F 6037 - 2 Top View Order Number MM54C922 or MM74C922 Top View Order Number MM54C923 or MM74C923 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 6037 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range...