74F374 Datasheet | National Semiconductor

Description The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications A buffered Clock (CP) and Output Enable (OE) are mon to all flip-flops Features Y Edge-triggered D-type inputs Y Buffered positive edge-triggered clock Y TRI-STATE outputs for bus-oriented applications Y Guaranteed 4000V minimum ESD protection mercial 74F374PC 74F374SC (Note 1) 74F374SJ (Note 1) 74F374MSA (Note 1) Military 54F374DM (QB) 54F374FM (QB) 54F374LM (QB) Package Number N20A J20A M20B M20D MSA20 W20A E20A Package Description 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Molded Shrink Small Outline EIAJ Type II 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX SJX and MSAX Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC SSOP and Flatpak Pin Assignment for LCC TL F 9524- 1 IEEE IEC TL F 9524 - 2 TL F 9524 - 3 TL F 9524- 4 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9524 RRD-B30M75 Printed in U S A Unit Loading Fan Out Pin Names Description 54F 74F UL HIGH LOW Input IIH IIL Output IOH IOL D0 - D7 CP OE O0 - O7 Data Inputs Clock Pulse Input (Active Rising Edge) TRI-STATE Output Enable Input (Active LOW) TRI-STATE Outputs 10 10 10 10 10 10 150 40 (33 3) 20 m A b0 6 m A 20 m A b0 6 m A 20 m A b0 6 m A b3 m A 24 m A (20 m A) Functional Description The ’F374 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs The buffered clock and buffered Output Enable are mon to all flip-flops The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition With the...