ADC08B3000 Datasheet | National Semiconductor

Description Note: This product is currently in development. - ALL specifications are design targets and are subject to change. The ADC08B3000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.8 Watts at 3 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential parator design, the innovative design of the internal sample-andhold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters upto Nyquist, producing a high 7.0 ENOB with a 748 MHz input signal and a 3 GHz sample rate while providing a 10-18 B.E.R. 3 GSPS is achieved through using a 1.5GHz clock. Output formatting is offset binary. The device contains a 4K FIFO Capture Buffer which is used to feed two 8 bit CMOS output busses at a rate up to 200MHz. The converter typically consumes less than 20 m W in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40˚C ≤ TA ≤ +85˚C) temperature range. Features n n n n n n n n n Internal Sample-and-Hold Single +1.9V ± 0.1V Operation Choice of SDR or DDR output clocking Internal selectable 4K Data Buffer Clock Phase Adjust for Multiple ADC Synchronization Guaranteed No Missing Codes Serial Interface for Extended Control Fine Adjustment of Input Full-Scale Range and Offset Duty Cycle Corrected Sample Clock Key Specifications n n n n n n n Resolution Max Conversion Rate Bit Error Rate ENOB @ 748 MHz Input SNR @ 748 MHz Full Power Bandwidth Power Consumption - Operating - Power Down Mode 8 Bits 3 GSPS (min) 10-18 (typ) 7.0 Bits (typ) 44 d B (typ) TBD 1.8 W (typ) 20 m W (typ) Applications n Ranging Applications n Test and measurement Applications Block Diagram © 2006 National Semiconductor...