ADC14L040 Datasheet | National Semiconductor

Description The ADC14L040 is a low power monolithic CMOS analogto-digital converter capable of converting analog input signals into 14-bit digital words at 40 Megasamples per second (MSPS). These converters use a differential, pipeline architecture with digital error correction and an on-chip sampleand-hold circuit to minimize power consumption while providing excellent dynamic performance and a 150 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC14L040 achieves 11.9 effective bits at nyquist and consumes just 235 m W at 40 MSPS . The Power Down feature reduces power consumption to 15 m W. The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a singleended input. Full use of the differential input is remended for optimum performance. Duty cycle stabilization and output data format are selectable using a quad state function pin. The output data can be set for offset binary or two’s plement. To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC14L040 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of - 40˚C to +85˚C. An evaluation board is available to ease the evaluation process. Features n n n n n n Single +3.3V supply operation Internal sample-and-hold Internal reference Outputs 2.4V to 3.6V patible Duty Cycle Stabilizer Power down mode Key Specifications n n n n n n n n Resolution DNL SNR (f IN = 10 MHz) SFDR (f IN = 10 MHz) Data Latency Power Consumption -- Operating -- Power Down Mode 14 Bits ± 0.5 LSB (typ) 74 d B (typ) 90 d B (typ) 7 Clock Cycles 235 m W (typ) 15 m W (typ) Applications n n n n Medical Imaging Instrumentation munications Digital Video w w w .d e e h s a t a . u t4 m o c © 2005 National Semiconductor Corporation DS201465 .national. .. Connection...