CD40163BC Datasheet | National Semiconductor

Description These (synchronous presettable up) counters are monolithic plementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors They feature an internal carry look-ahead for fast counting schemes and for cascading packages without additional gating A low level at the load input disables counting and causes the outputs to agree with the data input after the next positive clock edge The clear function for the CD40162B and CD40163B is synchronous and a low level at the clear input sets all four outputs low after the next positive clock edge The clear function for the CD40160B and CD40161B is asynchronous and a low level at the clear input sets all four outputs low regardless of the state of the clock Counting is enabled when both count enable inputs are high Input T is fed forward to also enable the carry out The carry output is a positive pulse with a duration approximately equal to the positive portion of QA and can be used to enable successive cascaded stages Logic transitions at the enable P or T inputs can occur when the clock is high or low Features Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L patibility or 1 driving 74LS Internal look-ahead for fast counting schemes Carry output for N-bit cascading Load control line Synchronously programmable Equivalent to MC14160B MC14161B MC14162B MC14163B Equivalent to MM74C160 MM74C161 MM74C162 MM74C163 Connection Diagram Dual-In-Line Package Order Number CD40160B CD40161B CD40162B or CD40163B TL F 5986 - 1 Top View C1995 National Semiconductor Corporation TL F 5986 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation...