CD4030C Datasheet | National Semiconductor

Description The EXCLUSIVE-OR gates are monolithic plementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors All inputs are protected against static discharge with diodes to VDD and VSS Applications Y Y Y Y Y Features Wide supply voltage range 3 0V to 15V Low power 100 n W (typ ) Medium speed t PHL e t PLH e 40 ns (typ ) operation at CL e 15 p F 10V supply High noise immunity 0 45 VCC (typ ) Automotive Data terminals Instrumentation Medical electronics Industrial controls Remote metering puters Schematic Diagram TL F 5961 - 1 Connection Diagram Dual-In-Line Package TL F 5961 - 2 Order Number CD4030 C1995 National Semiconductor Corporation TL F 5961 RRD-B30M105 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin (Note 1) Operating Temperature Range CD4030M CD4030C VSS b0 3V to VSS a 15 5V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VDD Range Lead Temperature (Soldering 10 seconds) b 65 C to a 150 C 700 m W 500 m W VSS a 3 0V to VSS a 15V 260 C DC Electrical Characteristics CD4030M Limits Symbol Parameter Conditions Min IL PD VOL VOH VNL VNH IDN IDP II Quiescent Device Current Quiescent Device Dissipation Package Output Voltage Low Level Output Voltage High Level Noise Immunity (All Inputs) Noise Immunity (All Inputs) Output Drive Current N-Channel (Note 2) Output Drive Current P-Channel (Note 2) Input Current VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VDD e 5 0V VDD e 10V VI e 0V or VI e VDD 4 95 9 95 15 30 14 29 0 75 15 b 0 45 b 0 95 b 55 C a 25 C a 125 C Units Max 30 60 150 600 0 05 0 05 m A m A m W m W V V V V V V V V m A m A m A m A p A Typ Max 05 10 25 10 0 05...