CD4046BC Datasheet | National Semiconductor

Description The CD4046B micropower phase-locked loop (PLL) consists of a low power linear voltage-controlled oscillator (VCO) a source follower a zener diode and two phase parators The two phase parators have a mon signal input and a mon parator input The signal input can be directly coupled for a large voltage signal or capacitively coupled to the self-biasing amplifier at the signal input for a small voltage signal Phase parator I an exclusive OR gate provides a digital error signal (phase p I Out) and maintains 90 phase shifts at the VCO center frequency Between signal input and parator input (both at 50% duty cycle) it may lock onto the signal input frequencies that are close to harmonics of the VCO center frequency Phase parator II is an edge-controlled digital memory network It provides a digital error signal (phase p II Out) and lock-in signal (phase pulses) to indicate a locked condition and maintains a 0 phase shift between signal input and parator input The linear voltage-controlled oscillator (VCO) produces an output signal (VCO Out) whose frequency is determined by the voltage at the VCOIN input and the capacitor and resistors connected to pin C1A C1B R1 and R2 The source follower output of the VCOIN (demodulator Out) is used with an external resistor of 10 k X or more The INHIBIT input when high disables the VCO and source follower to minimize standby power consumption The zener diode is provided for power supply regulation if necessary Features Wide supply voltage range 3 0V to 18V Low dynamic 70 m W (typ ) at power consumption fo e 10 k Hz VDD e 5V VCO frequency 1 3 MHz (typ ) at VDD e 10V Low frequency drift 0 06% C at VDD e 10V with temperature High VCO linearity 1% (typ ) Applications Y Y Y Y Y Y Y Y FM demodulator and modulator Frequency synthesis and multiplication Frequency discrimination Data synchronization and conditioning Voltage-to-frequency conversion Tone decoding FSK modulation Motor speed control Block Connection...