COP87L88GG Datasheet | National Semiconductor

Description The COP87L88GG OTP microcontroller is a member of the COP8TM feature family using an 8-bit core architecture It is pin and software patible to the mask ROM COP888GG product family (Continued) Packages 40 DIP with 36 I O pins 44 PLCC with 40 I O pins CPU Instruction Set Features Features Full duplex UART Three 16-bit timers each with two 16-bit registers supporting Processor independent PWM mode External event counter mode Input capture mode 16 kbytes on-board OTP EPROM with security feature 512 bytes on-board RAM Additional Peripheral Features Y Y Y Y Y Idle Timer Multi-Input Wakeup (MIWU) with optional interrupts (8) WATCHDOGTM and clock monitor logic Two analog parators MICROWIRE PLUSTM serial I O 1 ms instruction cycle time Fourteen multi-source vectored interrupts servicing External interrupt with selectable edge Idle Timer T0 Three Timers (each with 2 interrupts) MICROWIRE PLUS Multi-Input Wakeup Software trap UART (2) Default VIS (default interrupt) Versatile and easy to use instruction set 8-bit Stack Pointer SP (stack in RAM) Two 8-bit register indirect data memory pointers (B and X) Fully Static CMOS Two power saving modes HALT and IDLE Single supply operation 2 7V - 5 5V Temperature ranges b40 C to a 85 C I O Features Data Shee Memory mapped I O . Y Emulation device for the COP888GG and COP888HG Software selectable I O options (TRI-STATE output Y Real time emulation and full program debug offered by push-pull output weak pull-up input high impedance in Meta Link Development System put) Schmitt trigger inputs on ports G and L Development Support Block Diagram TL DD 12532 - 1 FIGURE 1 Block Diagram TRI-STATE is a registered trademark of National Semiconductor Corporation MICROWIRE PLUSTM COP8TM and WATCHDOGTM are trademarks of National Semiconductor Corporation PC is a registered trademark of International Business Machines Corporation ice MASTERTM is a trademark of Meta Link Corporation C1996...