DM74S163 Datasheet | National Semiconductor

Description These synchronous presettable counters feature an internal carry look-ahead for application in high-speed counting designs They are 4-bit binary counters The carry output is decoded by means of a NOR gate thus preventing spikes during the normal counting mode of operation Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count enable inputs and internal gating This mode of operation eliminates the output counting spikes which are normally associated with asynchronous (ripple clock) counters A buffered clock input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform These counters are fully programmable that is the outputs may be preset to either level As presetting is synchronous setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable input The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating Instrumental in acplishing this function are two count-enable inputs and a ripple carry output Both countenable inputs (P and T) must be high to count and input T is fed forward to enable the ripple carry output The ripple carry output thus enabled will produce a high-level output pulse with a duration approximately equal to the high-level portion of the QA output This high-level overflow ripple carry pulse can be used to enable successive cascaded stages Features Y Synchronously programmable Y Internal look-ahead for fast counting Y Carry output for n-bit cascading Y Synchronous counting Y Load control line Y Diode-clamped inputs Connection Diagram Dual-In-Line Package Order Number DM74S161N or DM74S163N See NS Package Number N16E TL F 6471 - 1 C1995 National Semiconductor Corporation TL F 6471 RRD-B30M105 Printed in...