DS25BR150 Datasheet | National Semiconductor

Description The DS25BR150 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over printed circuit boards and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. The DS25BR150 is a buffer/repeater with very low power consumption. Other LVDS devices with similar IO characteristics and with signal conditioning features include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, the DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. Wide input mon mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce ponent count, and further minimize board space. Features - DC - 3.125 Gbps low jitter, high noise immunity, low power operation - On-chip 100 Ω input and output termination minimizes insertion and return losses, reduces ponent count and minimizes board space - 7 k V ESD on LVDS I/O pins protects adjoining ponents - Small 3 mm x 3 mm LLP-8 space saving package Applications - - - - - - - Clock or data buffering / repeating OC-48 / STM-16 Clock or data buffering / repeating Serial ATA (SATA-150 and SATA-300) Fibre Channel (2GFC) PCI Express Infini Band Fire Wire Typical Application © 2007 National Semiconductor Corporation .national. Block Diagram Pin Diagram Pin Descriptions Pin Name NC IN+ INNC NC OUTOUT+ VCC GND Pin Name 1 2 3 4 5 6 7 8 DAP Pin Type NA Input Input NA NA Output Output Power Power Pin Description "NO...