DS3662 Datasheet | National Semiconductor

Description The DS3662 is a quad high speed Schottky bus transceiver intended for use with terminated 120Ω impedance lines. It is specifically designed to reduce noise in unbalanced transmission systems. The open collector drivers generate precise trapezoidal waveforms with rise and fall times of 15 ns (typical), which are relatively independent of capacitive loading conditions on the outputs. This reduces noise coupling to the adjacent lines without any appreciable impact on the maximum data rate obtainable with high speed bus transceivers. In addition, the receivers use a low pass filter in conjunction with a high speed parator, to further enhance the noise immunity. Tightly controlled threshold levels on the receiver provide equal rejection to both negative and positive going noise pulses on the bus. The external termination is intended to be a 180Ω resistor from the bus to 5V logic supply, together with a 390Ω resistor from the bus to ground. The bus can be terminated at one or both ends. A two input NOR gate is provided to disable all drivers in a package simultaneously. Features n Pin to pin functional replacement for DS8641 n Guaranteed AC specifications on noise immunity and propagation delay over the specified temperature and supply voltage range n Temperature insensitive receiver thresholds track bus logic level n Trapezoidal bus waveforms reduce noise coupling to adjacent lines n Precision receiver thresholds provide maximum noise immunity and symmetrical response to positive and negative going pulses n Open collector driver output allows wire-OR connection n High speed Schottky technology n 15 µA typical bus termination current with normal VCC or with VCC = 0V n Glitch free power up/down protection on the driver output n TTL patible driver and disable inputs, and receiver outputs Block and Connection Diagram Dual-In-Line Package DS005803-1 Top View Order Number DS3662J, DS3662N or DS3662WM See NS Package Number J16A, N16A or M16B Trapezoidal™ is a...