DS3897 Datasheet | National Semiconductor

Description These advanced transceivers are specifically designed to overe problems associated with driving a densely populated backplane, and thus provide significant improvement in both speed and data integrity. Their low output capacitance, low output signal swing and noise immunity features make them ideal for driving low impedance buses with minimum power consumption. The DS3896 is an octal high speed schottky bus transceiver with mon control signals, whereas the DS3897 is a quad device with independent driver input and receiver output pins. The DS3897 has a separate driver disable for each driver and is, therefore, suitable for arbitration lines. The separate driver disable pins (En) feature internal pull ups and may be left open if not required. On the other hand, the DS3896 provides high package density for data/address lines. The open collector drivers generate precise trapezoidal waveforms, which are relatively independent of capacitive loading conditions on the outputs. This significantly reduces noise coupling to adjacent lines. In addition, the receivers use a low pass filter in conjunction with a high speed parator, to further enhance the noise immunity and provide equal rejection to both negative and positive going noise pulses on the bus. To minimize bus loading, these devices also feature a schottky diode in series with the open collector output that isolates the driver output capacitance in the disabled state. The output low voltage is typically “1V” and the output high level is intended to be 2V. This is achieved by terminating the bus with a pull up resistor to 2V at both ends. The device can drive an equivalent DC load of 18.5Ω (or greater) in the above configuration. These signalling requirements, including a 1 volt signal swing, low output capacitance and precise receiver thresholds are referred to as Bus Transceiver Logic (BTL). Features n 8 bit DS3896 transceiver provides high package density n 4 bit DS3897 transceiver provides separate...