DS42BR400 Datasheet | National Semiconductor

Description The DS42BR400 is a quad 250 Mbps - 4.25 Gbps CML transceiver, or 8-channel buffer, for use in backplane and cable applications. With operation down to 250 Mbps, the DS42BR400 can be used in applications requiring both low and high frequency data rates. Each input stage has a fixed equalizer to reduce ISI distortion from board traces. The equalizers are grouped in fours and are enabled through two .. control pins. These control pins provide customers flexibility where ISI distortion may vary from one direction to another. All output drivers have four selectable steps of de-emphasis to pensate against transmission loss across long FR4 backplanes. The de-emphasis blocks are also grouped in fours. In addition, the DS42BR400 also has loopback control capability on four channels. All CML drivers have 50Ω termination to VCC. All receivers are internally terminated with differential 100Ω. Features - - - - - - 250 Mbps - 4.25 Gbps Fully Differential Data Paths Optional Fixed Input Equalization Selectable Output De-emphasis Individual Loopback Controls On-chip Termination Lead-less e LLP-60 pin package (9 mm x 9 mm x 0.8 mm, 0.5 mm pitch) - - 40°C to +85°C Industrial Temperature Range - 6 k V ESD Rating, HBM Applications - Backplane driver or cable driver - Signal repeating, buffering and conditioning applications Simplified Application Diagram © 2008 National Semiconductor Corporation .national. Functional Block Diagram .. .national. Connection Diagram .. Leadless e LLP-60 Pin Package (9 mm x 9 mm x 0.8 mm, 0.5 mm pitch) Order number DS42BR400TSQ See NS Package Number SQA060 .national. Pin Descriptions Pin Name IB_0+ IB_0- OA_0+ OA_0- IB_1+ IB_1- OA_1+ OA_1- IB_2+ IB_2- Pin Number 51 52 48 49 43 42 40 39 33 34 36 37 25 24 28 27 58 57 55 54 6 7 3 4 10 9 13 12 18 19 21 22 I/O I O I O I O I O I O I O I O I O Description Inverting and non-inverting differential inputs of port_0....