DS90LV018A Datasheet | National Semiconductor

Description The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV018A accepts low voltage (350 m V typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout. The DS90LV018A and panion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications. Features n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 2.5 ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedance on LVDS inputs Low Power design (18m W @ 3.3V static) Interoperable with existing 5V LVDS networks Accepts small swing (350 m V typical) differential signal levels Supports open, short and terminated input fail-safe Conforms to ANSI/TIA/EIA-644 Standard Industrial temperature operating range (- 40˚C to +85˚C) Available in SOIC package Connection Diagram Dual-in-Line Functional Diagram DS100078-2 Truth Table INPUTS DS100078-1 OUTPUT ROUT H L H Order Number DS90LV018ATM See NS Package Number M08A [RIN+] - [RIN- ] VID ≥ 0.1V VID ≤ - 0.1V Full Fail-safe OPEN/SHORT or Terminated © 1998 National Semiconductor Corporation DS100078 .national. Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) - 0.3V to +4V - 0.3V to +3.9V Input Voltage (RIN+, RIN- ) - 0.3V to (VCC + 0.3V) Output Voltage (ROUT) Maximum Package Power...