DS91C176 Datasheet | National Semiconductor

Description The DS91C176 and DS91D176 are high-speed M-LVDS differential transceivers designed for multipoint applications with multiple drivers or receivers. Multipoint LVDS (M-LVDS) is a new bus interface standard (TIA/EIA-899) based on LVDS but including several enhancements to improve multipoint performance. M-LVDS devices have superior drive capability and can support up to 32 loads. Along with increased drive, M-LVDS devices are required to have a controlled edge rate to minimize reflections and EMI. The 1 n Sec minimum edge rate is tolerant of stub lengths up to 2 inches in length. MLVDS devices also have a very large mon mode range for additional noise margin in heavily loaded and noisy backplane environments. The DS91C176/DS91D176 are half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver inputs and convert them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL) and convert them to 3V LVCMOS signals. The DS91D176 has a M-LVDS type 1 receiver input with no offset. The DS91C176 receiver contains an M-LVDS type 2 failsafe circuit with an internal 100 m V offset that provides a LOW output for both short and open input conditions. Features - - - - - - - - - - Meets TIA/EIA-899 M-LVDS Standard Capable of driving 32 LVDS loads Controlled Edge Rates Tolerant to Stubs Wide mon Mode for Increased Noise Immunity DS91D176 has type 1 receiver input DS91C176 has type 2 receiver with fail-safe Up to 200 Mbps operation Industrial temperature range Single 3.3V supply 8-lead SOIC package Typical Application in Advanced TCA Clock Distribution © 2007 National Semiconductor Corporation .national. DS91D176/DS91C176 Connection and Logic Diagram Top View Order Number DS91D176TMA, DS91C176TMA See NS Package Number M08A Ordering Information Order Number DS91D176TMA DS91C176TMA Receiver Input type 1 type 2 Function Data (0V threshold receiver) Control (100...