DS92LV2412 Datasheet | National Semiconductor

Description The DS92LV2411 (Serializer) / DS92LV2412 (Deserializer) chipset translates a parallel 24- bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size and interconnect cost for transferring a 24-bit, or less, bus over FR-4 printed circuit board backplanes, differential or coax cables. In addition to the 24-bit data bus interface, the DS92LV2411/12 also features a 3-bit control bus for slow speed signals. This allows implementing video and display applications with up to 24- bits per pixel (RGB888), or embedding audio information with pressed video formats. Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC balancing enables long distance transmission over lossy cables and backplanes. The DS92LV2412 automatically locks to ining data without an external reference clock or special sync patterns, providing easy “plug-and-go” or “hot plug” operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability. The DS92LV2411/12 chipset is programmable though an I2C interface as well as through pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2411 is offered in a 48-pin LLP and the DS92LV2412 is offered in a 60-pin LLP package. Both devices operate over the full industrial temperature range of -40° C to +85°C. Features - - - - - - - - - 24- bit data, 3- bit control, 5 - 50 MHz clock Application payloads up to 1.2 Gbps AC coupled interconnects: STP up to 10 m or coax 20+ m 1.8V or 3.3V patible LVCMOS I/O interface Integrated terminations on Ser and Des AT-SPEED BIST mode and reporting pin Configurable by pins or I2C patible serial control bus Power down mode minimizes power dissipation >8 k V HBM ESD Rating SERIALIZER - DS92LV2411 - Supports Spread...