LMC7532 Datasheet | National Semiconductor

description The LMC7532 is a Column Driver suitable for National’s Reduced Swing Differential Signalling (RSDS) digital interface. It converts this 18-bit digital data into analog voltage for 300 or 309 columns, charging each sub-pixel to the correct gray level corresponding to the digital value. The RSDS path to the panel timing controller contributes toward lowering radiated EMI, reducing system power consumption and eliminates one of the two pixel busses used in typical XGA TFT-LCD panels today. This single 9-bit differential bus conveys the 18-bit color data for XGA panels at 130Mb/s when using VESA 60 Hz standard timing. With the addition of a single National DS90CF364 or ‘564 FPD-Link™ chip, and the FPD63310 Universal Interface XGA/SVGA Timing controller, the entire data path is optimized for reduced EMI, power consumption and width. Feature s Reduced Swing Differential Signalling (RSDS)™ digital bus reduces power, EMI and width from timing controller. s Selectable 300/309 outputs provides ability to drive SVGA and XGA TFT-LCD systems. s Switched reference type DAC gives high accuracy with low reference current requirements. 65MHZ s Clock Frequency up to: +/-5 m V s Typical Accuracy: s Narrow bus. s 64 gray scales. s Receive RSDS @ 130Mb/s width @ 65MHz clock from FPD 63310. System Diagram Gray Scale Voltage Reference BUS Line Transfer Signal /9 + CLK, RSDS BUS Start Pulse Gray scale Reference Inversion Control /2 Link1 /2 Link2 /2 Link3 /2 Link C 1 n 1 n 1 n 1 n Start Pulse A1 DS90CF564 /364 FPD-Link FPD63310 XGA Panel Timing Controller An Gate Clock 1024 X 768 or 800 X 600 TFT-LCD Array VDD VSS En Panel Power Supply NM93CSxx L Serial EEPROM E1 FIGURE 1. Block diagram of the LCD module FPD-Link™ is a trademark of National Semiconductor ©1997 NSC 1 http://.national. Package Infomation 1 1 AVSS AVDD VOP VREF11 VREF9 VREF7 VREF5 VREF3 VREF1 DVDD DGND NOUT309 DVDD R/L D20P D20N D21P D21N D22P D22N TP1...