LMH0041 Datasheet | National Semiconductor

Description The LMH0041 family of products provide a very simple 1:5 deserializer and receiver function. The device is intended to be paired with an FPGA host which will receive the raw 5 bit data words and will decode the data appropriately such that a SMPTE standard signal may be recovered. The devices are designed to receive data pliant with DVB-ASI, SMPTE 259M, SMPTE 292M and/or SMPTE 424M. The interface between the LMH0041 and the FPGA consists of a 5 bit wide LVDS bus, an LVDS clock and an SMBus interface. All devices except for the LMH0051 includes a reclocked feedthrough output with a SMPTE pliant cable driver. The LMH0341 includes support for SMPTE424M, and the LMH0071 is a Stadard Definition (SD) only variant. The product is packaged in a physically small 48 pin LLP package. Key Specifications - Output pliant with SMPTE 259M-C, SMPTE 292M, SMPTE 424M and DVB-ASI - Typical power dissipation: 410 m W (loopthrough disabled) - 0.6 UI Input Jitter Tolerance Features - - - - - - LVDS Interface Dual multiplexed inputs No external VCO or clock required Loopthrough with Cable Driver SMBus configuration interface 48 pin LLP package Applications - SDI interfaces for: - - - - Video Cameras DVRs Video Switchers Video Editing Systems Block Diagram © 2007 National Semiconductor Corporation .national. LMH0341, LMH0041, LMH0071, LMH0051 TABLE 1. Feature Table Device LMH0341 LMH0041 LMH0071 LMH0051 × SMPTE 424M Support SMPTE 292M Support SMPTE 259M Support DVB-ASI Support Active Loopthrough × × × × × × × × × × × × × × Device Operation The LMH0041 deserializer is used in digital video signal origination equipment. It is intended to be operated in conjunction with an FPGA host which processes the received data to recover the original parallel data from the five bit wide datapath that es from the LMH0041. The LMH0041 requires the use of an external equalizer such as the LMH0044, which can be directly connected to the LMH0041. ternal framer and...