LMX2525 Datasheet | National Semiconductor

Description LMX2525 is a highly integrated, high performance, low power frequency synthesizer system optimized for dualband Japan PDC mobile handsets. Using a proprietary digital phase locked loop technique, LMX2525 generates very stable, low noise local oscillator signals for up and down conversion in wireless munications devices. LMX2525 includes dual voltage controlled oscillators (VCOs) for the upper and lower Japan PDC frequency bands, a loop filter, and a fractional-N RF PLL based on a delta sigma modulator. In concert, these blocks form a closed loop RF synthesizer system. The RF synthesizer system supports two frequency bands: PDC1500 and PDC800. Serial data is transferred to the device via a three-wire MICROWIRE interface (DATA, LE, CLK). Operating supply voltage ranges from 2.5 V to 3.3 V. LMX2525 features low current consumption: 10 m A at 2.8 V when operating in the PDC800 mode. LMX2525 is available in a 24-pin leadless leadframe package (LLP). Features n Small Size 5.0 mm X 4.0 mm X 0.75 mm 24-Pin LLP Package n RF Synthesizer System Two Integrated VCOs Integrated Loop Filter Low Spurious, Low Phase Noise Fractional-N RF PLL Based on 10-Bit Delta Sigma Modulator Frequency Resolution Down to 20 k Hz n Supports Various Reference Frequencies 12.6 MHz, 14.4 MHz, 25.2MHz, and 26.0 MHz n Fast Lock Time: 300 µs n Low Current Consumption 10 m A at 2.8 V in PDC800 Mode n 2.5 V to 3.3 V Operation n Digital Filtered Lock Detect Output n Hardware and Software Power Down Control Applications n Japan PDC Systems at 800 MHz and 1500 MHz Frequency Bands. Functional Block Diagram Fast Lock™ is a trademark of National Semiconductor Corporation. TRI-STATE® is a registered trademark of National Semiconductor Corporation. PLLatinum™ is a trademark of National Semiconductor Corporation. © 2004 National Semiconductor Corporation DS200689 .national. Connection Diagram 24-Pin 5x4 LLP (LQ) Package Note: Analog ground connected through exposed die attached...