LMX3161 Datasheet | National Semiconductor

Description The LMX3161 Single Chip Radio Transceiver is a monolithic, integrated radio transceiver optimized for use in a Digital Enhanced Cordless Telemunications (DECT) system. It is fabricated using National’s ABi C V Bi CMOS process (f T = 18 GHz). The LMX3161 contains phase locked loop (PLL), transmit and receive functions. The 1.1 GHz PLL block is shared between transmit and receive section. The transmitter includes a frequency doubler, and a high frequency buffer. The receiver consists of a 2.0 GHz low noise mixer, an intermediate frequency (IF) amplifier, a high gain limiting amplifier, a frequency discriminator, a received signal strength indicator (RSSI), and an analog DC pensation loop. The PLL, doubler, and buffers can be used to implement open loop modulation along with an external VCO and loop filter. The circuit features on-chip voltage regulation to allow supply voltages ranging from 3.0V to 5.5V. Two additional voltage regulators provide a stable supply source to external discrete stages in the Tx and Rx chains. The IF amplifier, high gain limiting amplifier, and discriminator are optimized for 110 MHz operation, with a total IF gain of 85 d B. The single conversion receiver architecture provides a low cost, high performance solution for munications systems. The RSSI output may be used for channel quality monitoring. The Single Chip Radio Transceiver is available in a 48-pin 7mm X 7mm X 1.4mm PQFP surface mount plastic package. Features n n n n n n n Single chip solution for DECT RF transceiver RF sensitivity to - 93 d Bm; RSSI sensitivity to - 100 d Bm Two regulated voltage outputs for discrete amplifiers High gain (85 d B) intermediate frequency strip Allows unregulated 3.0V- 5.5V supply voltage Power down mode for increased current savings System noise figure 6.5 d B (typ) Applications n n n n Digital Enhanced Cordless Telemunications (DECT) Personal wireless munications (PCS/PCN) Wireless local area networks (WLANs) Other wireless munications...