LP3878-ADJ Datasheet | National Semiconductor

Description The LP3878-ADJ is an 800 m A adjustable output voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1.0V. Using an optimized VIP™ (Vertically Integrated PNP) process, the LP3878-ADJ delivers superior performance: Ground Pin Current: Typically 5.5 m A @ 800 m A load, and .. 180 µA @ 100 µA load. Low Power Shutdown: The LP3878-ADJ draws less than 10 µA quiescent current when shutdown pin is pulled low. Precision Output: Guaranteed output voltage accuracy is 1% at room temperature. Low Noise: Broadband output noise is only 18 µV (typical) with 10 n F bypass capacitor. Features n n n n n n n n 1.0V to 5.5V output Designed for use with low ESR ceramic capacitors Very low output noise 8 Lead PSOP and LLP surface mount package < 10 µA quiescent current in shutdown Low ground pin current at all loads Over-temperature/over-current protection -40˚C to +125˚C operating junction temperature range Applications n ASIC Power Supplies In: - Desktops, Notebooks and Graphic Cards - Set Top Boxes, Printers and Copiers n DSP and FPGA Power Supplies n SMPS Post-Regulator n Medical Instrumentation Basic Application Circuit - Capacitance values shown are minimum required to assure stability. Larger output capacitor provides improved dynamic response. Output capacitor must meet ESR requirements (see Application Information). - - The Shutdown pin must be actively terminated (see Application Information). Tie to INPUT (Pin 4) if not used. VIP™ is a trademark of National Semiconductor Corporation. © 2005 National Semiconductor Corporation DS201209 .national. Connection Diagrams 8 Lead PSOP Package (MRA) 8 Lead LLP Surface Mount Package (SD) Top View See NS Package Number MRA08A Top View See NS Package Number SDC08A Ordering Information .. TABLE 1. Package Marking and Ordering Information Grade STD STD STD STD Order Information LP3878MR-ADJ LP3878MRX-ADJ LP3878SD-ADJ...