LP5551 Datasheet | National Semiconductor

Description The LP5551 is a PWI 1.0 pliant Energy Management System for reducing power consumption of stand-alone mobile phone processors such as base-band or applications processors. The LP5551 contains two advanced, digitally controlled .. switching regulators for supplying variable voltage to processor core and memory. Two regulators provide P- and N- well biasing for threshold scaling applications. The device also integrates 4 programmable LDO-regulators for powering I/O, PLLs and maintaining memory retention in shutdown-mode. The device is controlled via the PWI open-standard interface. The LP5551 operates cooperatively with Power Wise™ technology patible processors to optimize supply voltages adaptively over process and temperature variations or dynamically using frequency/voltage pre-characterized look-up tables and provides P- and N-well biasing for threshold scaling. Features - 2 300 m A buck regulators operate 180 degrees out of phase for reduced EMI - 1 MHz PWM switching frequency - 4 programmable LDOs ideal for I/O (two of these), PLL, and memory retention supply generation. Adaptive Voltage Scaling - Supports high-efficiency Power Wise Technology - PWI open standard interface for system power - - - - - management Digitally controlled intelligent voltage scaling Auto or PWI controlled PFM mode transition Internal soft start/startup sequencing. Adjustable P- and N- well bias supply for threshold scaling Power OK output. Applications - - - - - - Dual core processors GSM/GPRS/EDGE & UMTS cellular handsets Hand-held radios PDAs Battery powered devices Portable instruments System Diagram FIGURE 1. System Diagram © 2007 National Semiconductor Corporation .national. Connection Diagrams and Package Mark Information - Pin LLP NS Package Number SQA36A .. FIGURE 2. LP5551 Pinout Package Mark Note: The actual physical placement of the package marking will vary from part to part. FIGURE 3. Top View .national....