LP5552 Datasheet | National Semiconductor

Description The LP5552 is a PWI 2.0 pliant Energy Management System for reducing power consumption of stand-alone mobile phone processors such as base-band or applications processors. The LP5552 contains two advanced, digitally controlled switching regulators for supplying variable voltage to processor core and memory. The device also incorporates 5 programmable LDO regulators for powering I/O, peripheral logic blocks, maintaining memory retention (dual-domains) in shutdown mode, and auxillary functions. The device is controlled via the PWI 2.0 open-standard interface. The LP5552 operates cooperatively with Power Wise technology patible processors to optimize supply voltages adaptively over process and temperature variations (adaptive voltage scaling) or dynamically using frequency/ voltage pre-characterized look-up tables (dynamic voltage scaling). Features n Two 800 m A buck regulators operate 180 degrees out of phase for reduced EMI n 3.6 MHz PWM switching frequency n Five programmable LDOs ideal for I/O , PLL, and memory retention supply generation. n Supports high-efficiency Power Wise Technology Adaptive Voltage Scaling n PWI 2.0 open standard interface for system power management n Digitally controlled intelligent voltage scaling n Auto or PWI controlled PFM mode transition n Internal soft start/startup sequencing. n Power OK output. Applications n Dual core processors n GSM/GPRS/EDGE & UMTS cellular handsets n Hand-held radios n PDAs n Battery powered devices . n Portable instruments Data Shee System Diagram FIGURE 1. System Diagram . © 2006 National Semiconductor Corporation DS202103 .national. .. Connection Diagrams and Package Mark Information 36 bump u SMD package NS Package Number TLA36TTA et4U. Data Shee . FIGURE 2. LP5552 Pinout . .national. 2 .. LP5552 PWI 2.0 and Power Wise™ Technology pliant Energy Management Unit Physical Dimensions inches (millimeters) unless otherwise noted 36-Bump u SMD Package NS Package...