MM54C932 Datasheet | National Semiconductor

Description The MM74C932 MM54C932 consists of two independent output phase parator circuits The two phase parators have a mon signal input and a mon parator input The signal input can be directly coupled for a large voltage signal or capacitively coupled to the self-biasing amplifier at the signal input for a small voltage signal Phase parator I an exclusive-OR gate provides a digital error signal (phase p I out) and maintains 90 phase shifts at the VCO center frequency Between signal input and parator input (both at 50% duty cycle) it may lock onto the signal input frequencies that are close to harmonics of the VCO center frequency Phase parator II is an edge-controlled digital memory network It provides a digital error signal (phase p II out) and lock in signal (phase pulses) to indicate a locked condition and maintains a 0 phase shift between signal input...