DS34RT5110 Datasheet | National Semiconductor

Description The DS34RT5110 is a 10.2 Gbps (3 x 3.4 Gbps) high performance re-clocking device that supports 3 Transition Minimized Differential Signaling (TMDS®) data channels and a single clock channel over DVI™ v1.0, and HDMI™ v1.3a data rates up to 3.4 Gbps for each data channel. The device incorporates a configurable receive equalizer, a clock and data recovery (CDR) circuit and a de-emphasis driver on each data channel. The clock channel feeds a high-performance phaselocked loop (PLL) that regenerates a low jitter output clock for data recovery. The DS34RT5110 equalizes and retimes greater than 25 meters 28 AWG of HDMI cable for 1080p resolution with 12 bit deep color depth (2.25 Gbps), to a low jitter version of the clock and data signal outputs, reducing both deterministic and random jitter. Several devices can be cascaded for long links without degrading signal fidelity. Obtaining total jitter is 0.09 UI or less over the supported data rates. This low level of output jitter provides system designers with extra margin and flexibility when working with stringent timing budgets. The transmitter supports configurable transmit de-emphasis so the output can be optimized for driving additional lengths of cables or FR4 traces. Features - Optimized for HDMI/DVI repeater applications - TMDS patible inputs with configurable receive equalization supporting data rates up to 3.4 Gbps emphasis - TMDS patible outputs with configurable transmit de- Dedicated CDR on each data channel reduces jitter - - - - - - - - - transfer, enabling multiple devices to be cascaded without impairing signal fidelity Capable of multi-hop extension of HDMI/DVI applications at data rates between 250 Mbps and 3.4 Gbps Resistor adjustable differential output voltage for AC coupled Cat5e and Cat6 extension applications 2 equalizer settings for a wide range of cable reaches at different data rates Total Output Jitter of 0.09 UI at 2.25 Gbps Total Output Jitter of 0.10 UI at 3.4 Gbps DVI 1.0 and...