SM5050A Description
Cr ystal connected between XT and XTN. Operating state control (inhibit). When INHN is LOW , output is high impedance and PLL circuits stop.
SM5050A Key Features
- 100 to 166.6MHz (VDD = VDDQ = 3.0 to 3.6V)
- 100 to 125MHz (VDD = VDDQ = 2.7 to 3.6V) 8mA output drive capability Oscillator capacitors (CG, CD) and feedback resisto
- Chip form (CF5050A)
- 8-pin VSOP package (SM5050AV)
- O I Ip Ip Supply Cr ystal oscillator connection pins. Cr ystal connected between XT and XTN. Operating state control (in
- Output circuit ground Output (CMOS) Output circuit supply Name X P1 VSS 620 290 Y 1330 1132 Ip
- Program input 1. Selects the output frequency multiplier ratio. Ground CF5050A P ad dimensions [µm] I/O 1 Description