SM5837AF Description
Delay length set parallel data bit DL1 (bit 1) when PARA is HIGH, and SICK shift clock when PARA is LOW. Delay length set parallel data bit DL2 (bit 2) when PARA is HIGH, and LEN latch clock when PARA is LOW.
SM5837AF Key Features
- 11-bit parallel input
- 3-line serial input TTL-patible input/outputs Tristate outputs 4.75 to 5.25 V operating voltage 44-pin QFP Molybenum-gat