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SM5838AS - 5120 X 8-bit Synchronous FIFO

Description

Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name DOUT0 DOUT1 DOUT2 DOUT3 OE RR VSS RE DOUT4 DOUT5 DOUT6 DOUT7 DIN7 DIN6 DIN5 DIN4 CLK VDD RW WE DIN3 DIN2 DIN1 DIN0 I/O O O O O I I I O O O O I I I I I I I I I I I Read data output bit 0 Read data output bi

Features

  • s s s RE 8 s s s s s s 5120 × 8-bit structure Variable-length delay (21 to 5120 bits) 33.3 MHz high-speed operation (normal-voltage specification) All input/outputs TTL compatible Independent read enable and output enable pins, allowing read address pointer increment in output data hold and output high-impedance states Supply voltage.
  • 4.5 to 5.5 V (normal-voltage specification).
  • 3.0 to 4.5 V (low-voltage specification) 24-pin SOP package Molybdenum-gate CMOS process A3-paper.

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Datasheet Details

Part number SM5838AS
Manufacturer Nippon Precision Circuits Inc
File Size 160.68 KB
Description 5120 X 8-bit Synchronous FIFO
Datasheet download datasheet SM5838AS Datasheet
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SM5838AS NIPPON PRECISION CIRCUITS INC. 5120 × 8-bit Synchronous FIFO OVERVIEW The SM5838AS is a 5120 × 8-bit synchronous FIFO (first in, first out) high-speed line buffer. Internally, it employs static CMOS circuits which mean that it effectively has limitless data hold times. It can operate at speeds up to 33.3 MHz (normal-voltage specification). The SM5838AS can be used to easily realize a 1-line delay in high-speed facsimile machines and digital copiers. PINOUT (TOP VIEW) DOUT0 1 24 DIN0 23 DIN1 22 DIN2 21 DIN3 DOUT1 2 DOUT2 3 DOUT3 4 S M5 8 3 8 AS OE 5 RR 6 VSS 7 20 WE 19 RW 18 VDD 17 CLK 16 DIN4 15 DIN5 14 DIN6 13 DIN7 FEATURES s s s RE 8 s s s s s s 5120 × 8-bit structure Variable-length delay (21 to 5120 bits) 33.
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