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SM5852FS - Digital Dynamic Bass Boost LSI

Description

Number 1 2 3 4 5 6 7 8 9 10 11 12 13 Name LRCI BCKI DI CLK VSS RSTN TESTN MUTEN DOUT BCKO LRCO VDD OPT I/O1 Ip Ip Ip I Ip Ip Ip O O O

Ip Input data sample rate (fs) clock input Bit clock input Serial data input Clock input Ground System reset initialization.

Reset when LOW.

Features

  • s s s s s s s s s s 2-channel processing Improved DDBB mode channel separation 6 input-level dependent dynamic gain characteristics Serial input/output interface 2s complement, MSB first, 16-bit 384fs system clock 23 × 23-bit multiplier/30-bit high-precision accumulator TTL-compatible input/output 3.2 to 5.5 V operating voltage range 16-pin SOP Molybdenum-gate CMOS.

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Datasheet preview – SM5852FS

Datasheet Details

Part number SM5852FS
Manufacturer Nippon Precision Circuits Inc
File Size 98.08 KB
Description Digital Dynamic Bass Boost LSI
Datasheet download datasheet SM5852FS Datasheet
Additional preview pages of the SM5852FS datasheet.

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Full PDF Text Transcription

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SM5852FS NIPPON PRECISION CIRCUITS INC. Digital Dynamic Bass Boost LSI OVERVIEW The SM5852FS is a digital signal processor IC that performs DDBB (digital dynamic bass boost) processing for use in digital audio reproduction equipment. It is designed for use with a 44.1 kHz sampling frequency. PINOUT LRCI BCKI DI CLK VSS RSTN TESTN MUTEN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DB/DS MOD2 MOD1 OPT VDD LRCO BCKO DOUT SM5852FS FEATURES s s s s s s s s s s 2-channel processing Improved DDBB mode channel separation 6 input-level dependent dynamic gain characteristics Serial input/output interface 2s complement, MSB first, 16-bit 384fs system clock 23 × 23-bit multiplier/30-bit high-precision accumulator TTL-compatible input/output 3.2 to 5.
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