SM5901AF - compression and non compression type anti-shock memory controller with built-in 1M DRAM

Pin number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pine name VDD2 UC1 UC2 UC3 UC4 VSS2 NTEST1 NTEST2 CLK VSS1 YSRDATA YLRCK YSCK ZSCK ZLRCK ZSRDATA YFLAG YFCLK YBLKCK NRESET ZSENSE VDD1 I/O Ip/O Ip/O Ip/O Ip/O Ip Ip I

• - 2-channel processing - Serial data input.
• 2s complement, 16-bit/MSB first, rear-packed format - System clock input.
• 384fs (16.9344 MHz).
• Digital attenuator - Anti-shock memory controller - ADPCM compression method.
• 4-level compression mode selectable pre lim 2×1M DRAM (256K×4 bits) Internal and external 1M DRAMs 1×1M DRAM (256K×4 bits) Only internal 1M DRAM - Compression mode selectable - Microcontroller interface.
• Serial command write and state read-.