SM5921A Overview
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Name VDD WCKI BCKI DIA DIB DIC DID XCS SCLK SI SIO TEST2 TEST3 DMUTEN RSTN VSS VDD TEST DOA DOB DOC DOD I/O 1 I I I I I I I I I Ot Id Id Ip Ip Id Ot Ot Ot Ot Supply pin Word clock input Bit clock.
SM5921A Key Features
- Intrinsic delay (mon to all channels, default = 0 samples, 16-sample units)
- 0. 025
SM5921A Applications
- Intrinsic delay (mon to all channels, default = 0 samples, 16-sample units)