FEATURES
(Segment mode) ! Shift Clock frequency: 20 MHz (Max.) (VDD = 5 V ± 10%) ! Adopts a data bus system ! 4-bit/8-bit parallel input modes are selectable with a mode (MD) pin ! Automatic transfer function with an enable signal ! Automatic counting function when in the chip select mode, causes the internal clock to be stopped by automatically counting 240 bits of input data (Common mode) ! Shift clock frequency : 4.0 MHz (Max.) ! Built-in 240-bits bidirectional shift register (divisible into 120-bits x 2) ! Available in a single mode (240-bits shift register) or in a dual mode(120-bits shift register x 2) 1. Y1 → Y240 Single mode 2. Y240 → Y1 Single mode 3. Y1 → Y120, Y121 → Y240 Dual mode 4. Y240 → Y121, Y120 → Y1 Dual mode The above 4 shift directions are pin-selectable (Both for segment mode and common mode) ! Supply voltage for LCD driver: 15.0 to 30.0 V ! Number of LCD driver outputs: 240 ! Low output impedance ! Low power consumption ! Supply voltage for the logic system: +2.5 to +5.5 V !