PC28F256P30 Overview
(P30) ® Embedded Memory Datasheet Product.
PC28F256P30 Key Features
- 85 ns initial access
- 52 MHz with zero wait states, 17ns clock-to-data output synchronous-burst read mode
- 25 ns asynchronous-page read mode
- 4-, 8-, 16-, and continuous-word burst mode
- Buffered Enhanced Factory Programming (BEFP) at 5 μ s/ byte (Typ)
- 1.8 V buffered programming at 7 μ s/byte (Typ)
- Multi-Level Cell Technology: Highest Density at Lowest Cost
- Asymmetrically-blocked architecture
- Four 32-KByte parameter blocks: top or bottom configuration
- 128-KByte main blocks
