TE28F256J3F105
Key Features
- Architecture
- Multi-Level Cell Technology: Highest Density at Lowest Cost
- 256 symmetrically-sized blocks of 128 Kbytes
- 95 ns initial access time for Easy BGA
- 105 ns initial accsss time for TSOP
- 25 ns 16-word Asynchronous page-mode reads
- 512-Word Buffer Programming at 1.46MByte/s (Typ)
- Voltage and Power
- VCC (Core) = 2.7 V to 3.6 V - VCCQ (I/O) = 2.7 V to 3.6 V - Standby Current: 65 µA (Typ)
- Erase & Program Current: 35 mA (Typ)
