MD56V62800A Description
The MD56V62800A is a 4-bank ¥ 2,097,152-word ¥ 8-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL patible.
MD56V62800A Key Features
- Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 4-bank
- 2,097,152-word
- 8-bit configuration 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL patible Output : LVTTL patible Refresh : 4096 cy
- CAS latency (1, 2, 3)
- Burst length (1, 2, 4, 8, full page)
- Data scramble (sequential, interleave)
- Burst read single bit write capability
- CBR auto-refresh, Self-refresh capability
- Package: 54-pin 400 mil plastic TSOP (Type II) (TSOPII54-P-400-0.80-K) (Product : MD56V62800A-xxTA) xx indicates speed r