Datasheet4U Logo Datasheet4U.com

MG63P - 0.25m Embedded DRAM/ Customer Structured Arrays

Datasheet Summary

Description

Oki’s 0.25 µm MG63P/64P/65P Application-Specific Integrated Circuit (ASIC) provides the ability to embed large blocks of Synchronous DRAM (SDRAM) into an embedded array architecture called the Customer Structured Array (CSA).

Features

  • 0.25µm drawn 3-, 4-, and 5-layer metal CMOS Optimized 2.5-V core Optimized 3-V I/O CSA architecture availability 100 MHz embedded SDRAM cores up to 16 Mb per occurrence 77-ps typical logic gate propagation delay (for a 4x-drive inverter gate with a fanout of 2 and 0 mm of wire, operating at 2.5 V) Over 5.4M raw gates and 868 I/O pads using 60µ staggered I/O User-configurable I/O with VSS, VDD, TTL, 3-state, and 1- to 24-mA options Slew-.

📥 Download Datasheet

Datasheet preview – MG63P

Datasheet Details

Part number MG63P
Manufacturer OKI electronic componets
File Size 267.61 KB
Description 0.25m Embedded DRAM/ Customer Structured Arrays
Datasheet download datasheet MG63P Datasheet
Additional preview pages of the MG63P datasheet.
Other Datasheets by OKI electronic componets

Full PDF Text Transcription

Click to expand full text
DATA SHEET O K I A S I C P R O D U C T S MG63P/64P/65P 0.25µm Embedded DRAM/ Customer Structured Arrays November 1998 MG63P/64P/65P 0.25µm Embedded DRAM/Customer Structured Arrays DESCRIPTION Oki’s 0.25 µm MG63P/64P/65P Application-Specific Integrated Circuit (ASIC) provides the ability to embed large blocks of Synchronous DRAM (SDRAM) into an embedded array architecture called the Customer Structured Array (CSA). Utilizing Oki’s leadership in DRAM technologies and wide experience of embedding SDRAM in logic products, Oki is able to integrate SDRAM and ASIC technology. The merged DRAM/ASIC process efficiently implements the Oki stacked capacitor memory cell. The MG63P/64P/65P CSA series uses three, four, and five metal process layers, respectively, on 0.25 µm drawn (0.
Published: |