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DATA SHEET
O K I N E T W O R K P R O D U C T S
ML53612 64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange
January 2000
Revision History September 1999 January 2000 320138-001 320138-002 Initial Release Timing tables altered on page 53: “Local Clock and Frame Synchronization Timing”, “Local Clock to CT Bus Clock Skew”, and “Local Serial Stream Timing” Timing diagram (Figure 11) atered on page 54: “Local Clock and Frame Synchronization Timing”
Oki Semiconductor
Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ML53612 Datasheet
