Datasheet4U Logo Datasheet4U.com

74ACT240 - Octal Buffer/Line Driver

This page provides the datasheet information for the 74ACT240, a member of the 74AC240 Octal Buffer/Line Driver family.

Description

density.

Features

  • ICC and IOZ Reduced by 50%.
  • Inverting 3.
  • State Outputs drive Bus Lines or Buffer Memory Address Registers.
  • Outputs Source/Sink 24 mA.
  • ACT240 has TTL.
  • compatible Inputs.
  • These are Pb.
  • Free Devices IEEE/IEC OE1 I0 O4 I1 O5 I2 O6 I3 O7 GND VCC OE2 O0 I4 O1 I5 O2 I6 O3 I7 Figure 1. Connection Diagram OE1 EN I0 O0 I1 O1 I2 O2 I3 O3 OE2 EN I4 O4 I5 O5 I6 O6 I7 O7 Figure 2. Logic Symbol TRUTH TABLES Inputs OE1 In L L L H H.

📥 Download Datasheet

Datasheet preview – 74ACT240

Datasheet Details

Part number 74ACT240
Manufacturer ON Semiconductor
File Size 376.06 KB
Description Octal Buffer/Line Driver
Datasheet download datasheet 74ACT240 Datasheet
Additional preview pages of the 74ACT240 datasheet.

📁 Similar Datasheet

  • 74ACT240 - OCTAL BUS BUFFER (STMicroelectronics)
  • 74ACT240 - Octal Buffer/Line Driver (Fairchild Semiconductor)
  • 74ACT241 - Octal Buffer/Line Driver (Fairchild Semiconductor)
  • 74ACT244 - OCTAL BUS BUFFER (STMicroelectronics)
  • 74ACT244 - Octal Buffer / Line Dricer (NXP)
  • 74ACT244 - Octal Buffer/Line Driver (Fairchild Semiconductor)
  • 74ACT245 - OCTAL BUS TRANSCEIVER (STMicroelectronics)
  • 74ACT245 - Octal Bidirectional Transceiver (Fairchild Semiconductor)
  • 74ACT20 - DUAL 4-INPUT NAND GATE (STMicroelectronics)
  • 74ACT251 - 8-Input Multiplexer (Fairchild Semiconductor)
Other Datasheets by ON Semiconductor

Full PDF Text Transcription

Click to expand full text
Octal Buffer/Line Driver with 3-State Outputs 74AC240, 74ACT240 General Description The AC240/ACT240 is an octal buffer and line driver designed to be employed as memory and address driver, clock drivers and bus oriented transmitter or receiver which provides improved PC board density. Features  ICC and IOZ Reduced by 50%  Inverting 3−State Outputs drive Bus Lines or Buffer Memory Address Registers  Outputs Source/Sink 24 mA  ACT240 has TTL−compatible Inputs  These are Pb−Free Devices IEEE/IEC OE1 I0 O4 I1 O5 I2 O6 I3 O7 GND VCC OE2 O0 I4 O1 I5 O2 I6 O3 I7 Figure 1. Connection Diagram OE1 EN I0 O0 I1 O1 I2 O2 I3 O3 OE2 EN I4 O4 I5 O5 I6 O6 I7 O7 Figure 2.
Published: |