CM1231-02SO Datasheet PDF - ON Semiconductor Low-Capacitance ESD Protection Array Specs

CM1231-02SO - Low-Capacitance ESD Protection Array

Datasheet Summary

Description

The CM1231

deep submicron ASIC protection.

These devices are ideal for protecting systems with high data and clock rates and for circuits requiring low capacitive loading such as USB 2.0.

02SO incorporates dual stage ESD ar

Features

easily routed “pass.
through” differential pinouts in a 6.
lead SOT23 package. Features.
Two Channels of ESD Protection.
Exceeds ESD Protection to IEC61000.
4.
2 Level 4:.
±12 kV Contact Discharge (OUT Pins).
Two.
Stage Matched Clamp Architecture.
Matching.
of.
Series Resistor (R) of ±10 mW Typical.
Flow.
Through Routing for High.
Speed Signal Integrity.
Differential Chan.

Datasheet Details

Part number	CM1231-02SO
Manufacturer	ON Semiconductor
File Size	312.12 KB
Description	Low-Capacitance ESD Protection Array
Datasheet	CM1231-02SO Datasheet
Additional preview pages of the CM1231-02SO datasheet.

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Full PDF Text Transcription

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CM1231-02SO 2, 4 and 8-Channel Low-Capacitance ESD Protection Array Product Description The CM1231−02SO is specifically designed for next generation deep submicron ASIC protection. These devices are ideal for protecting systems with high data and clock rates and for circuits requiring low capacitive loading such as USB 2.0. The CM1231−02SO incorporates dual stage ESD architecture which offers dramatically higher system level ESD protection compared with traditional single clamp designs. In addition, the CM1231−02SO provides a controlled filter roll−off for even greater spurious EMI suppression and signal integrity. The CM1231−02SO protects against ESD pulses up to ±12 kV contact on the “OUT” pins per the IEC 61000−4−2 standard.

Published: Sep 17, 2016 |