CM1231-02SO Overview
The CM1231−02SO is specifically designed for next generation deep submicron ASIC protection. These devices are ideal for protecting systems with high data and clock rates and for circuits requiring low capacitive loading such as USB 2.0. The CM1231−02SO incorporates dual stage ESD architecture which offers dramatically higher system level ESD protection pared with traditional single clamp designs.
CM1231-02SO Key Features
- Two Channels of ESD Protection
- Exceeds ESD Protection to IEC61000-4-2 Level 4
- ±12 kV Contact Discharge (OUT Pins)
- Two-Stage Matched Clamp Architecture
- Matching-of-Series Resistor (R) of ±10 mW Typical
- Flow-Through Routing for High-Speed Signal Integrity
- Differential Channel Input Capacitance Matching of 0.02 pF Typical
- Improved Powered ASIC Latchup Protection
- Dramatic Improvement in ESD Protection vs. Best in Class
- 40% Reduction in Peak Clamping Voltage
CM1231-02SO Applications
- USB Devices Data Port Protection
- General High−Speed Data Line ESD Protection
- Standard test condition is IEC61000−4−2 level 4 test circuit with each (AOUT/BOUT) pin subjected to ±12 kV contact discharge for 1000 pulses. Discharges are tim