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CM3202-00 - DDR VDDQ and VTT Termination Voltage Regulator

General Description

The CM3202 00 is a dual output low noise linear regulator designed to meet SSTL 2 and SSTL 3 specifications for DDR

SDRAM VDDQ supply and termination voltage VTT supply.

00 can source up to 2 A of VDDQ continu

Key Features

  • Two Linear Regulators.
  • Maximum 2 A Current from VDDQ.
  • Source and Sink Up to 2 A VTT Current.
  • 1.7 V to 2.8 V Adjustable VDDQ Output Voltage.
  • 500 mV Typical VDDQ Dropout Voltage at 2 A.
  • VTT Tracking at 50% of VDDQ.
  • Excellent Load and Line Regulation, Low Noise.
  • Fast Transient Response.
  • Meet JEDEC DDR.
  • I and DDR.
  • II Memory Power Spec.
  • Linear Regulator Design Requires No Inductors and Has Low Ex.

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Datasheet Details

Part number CM3202-00
Manufacturer onsemi
File Size 193.99 KB
Description DDR VDDQ and VTT Termination Voltage Regulator
Datasheet download datasheet CM3202-00 Datasheet

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Full PDF Text Transcription (Reference)

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CM3202-00 DDR VDDQ and VTT Termination Voltage Regulator Product Description The CM3202−00 is a dual−output low noise linear regulator designed to meet SSTL−2 and SSTL−3 specifications for DDR−SDRAM VDDQ supply and termination voltage VTT supply. With integrated power MOSFET’s, the CM3202−00 can source up to 2 A of VDDQ continuous current, and source or sink up to 2 A VTT continuous current. The typical dropout voltage for VDDQ is 500 mV at 2 A load current. The CM3202−00 provides fast response to transient load changes. Load regulation is excellent, from no load to full load. It also has built−in over−current limits and thermal shutdown at 170°C. The CM3202−00 supports Suspend−To−RAM (STR) and ACPI compliance with shutdown mode which tri−states VTT to minimize quiescent system current.