Datasheet Details
| Part number | FDC6302P |
|---|---|
| Manufacturer | onsemi |
| File Size | 343.75 KB |
| Description | Dual P-Channel MOSFET |
| Datasheet |
 FDC6302P Datasheet
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General Description
These Dual P-Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology.
This very high density process is especially tailored to minimize onstate resistance.
Key Features
- -25 V, -0.12 A continuous, -0.5 A Peak. RDS(ON) = 13 Ω @ VGS= -2.7 V RDS(ON) = 10 Ω @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace multiple PNP digital transistors (IMHxA series) with one DMOS FET. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 Absolute Maximum Ratings TA = 25oC unless other wise noted Symbol Parameter VDSS Drain-Source Voltage VG.