Datasheet Details
| Part number | FDC6320C |
|---|---|
| Manufacturer | onsemi |
| File Size | 490.96 KB |
| Description | Dual N & P Channel Digital FET |
| Datasheet |
 FDC6320C Datasheet
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General Description
These dual N & P Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology.
This very high density process is especially tailored to minimize on-state resistance.
Key Features
- N-Ch 25 V, 0.22 A, RDS(ON) = 5 Ω @ VGS= 2.7 V. P-Ch 25 V, -0.12 A, RDS(ON) = 13 Ω @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th) < 1.5 V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace NPN & PNP digital transistors. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 43 52 61 Absolute Maximum Ratings TA = 25oC unless other wise noted Symbol Parameter N-Channel VDSS, VCC VGSS, VIN ID, IO Drain-Source Vo.