Description
These P-Channel enhancement mode power field effect transistors are produced using ON Semiconductor’s proprietary, planar stripe, DMOS technology.
Features
- -2.1A, -500V, RDS(on) = 4.9Ω @VGS = -10 V.
- Low gate charge ( typical 18 nC).
- Low Crss ( typical 9.5 pF).
- Fast switching.
- 100% avalanche tested.
- Improved dv/dt capability.
- Qualified to AEC Q101.
- RoHS Compliant
S
D
!
GS
D-PAK
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol VDSS ID
IDM VGSS EAS IAR EAR dv/dt PD
TJ, TSTG TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C) - Conti.
FQD3P50TM-F085 Datasheet
