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HC240A Description

MC74HC240A Octal 3-State Inverting Buffer/Line Driver/Line Receiver High−Performance Silicon−Gate CMOS The MC74HC240A is identical in pinout to the LS240. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LSTTL outputs.

HC240A Key Features

  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1 mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In pliance with the Requirements Defined by JEDEC Standard
  • Chip plexity: 120 FETs or 30 Equivalent Gates
  • NLV Prefix for Automotive and Other