Datasheet4U Logo Datasheet4U.com

MC100E141 - 8-BIT SHIFT REGISTER

General Description

The MC10E/100E141 is an 8-bit full-function shift register.

The E141 performs serial/parallel in and serial/parallel out, shifting in either direction.

D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting.

Key Features

  • http://onsemi. com PLCC.
  • 28 FN SUFFIX CASE 776.
  • 700 MHz Min. Shift Frequency 8-Bit Full-Function, Bi-Directional Asynchronous Master Reset Pin-Compatible with E241 PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE =.
  • 4.2 V to.
  • 5.7 V Internal Input 50 kW Pulldown Resistors ES.

📥 Download Datasheet

Datasheet Details

Part number MC100E141
Manufacturer onsemi
File Size 155.93 KB
Description 8-BIT SHIFT REGISTER
Datasheet download datasheet MC100E141 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MC100E141 8-BIT SHIFT REGISTER Motorola
MC100E142 9-BIT SHIFT REGISTER Motorola
MC100E143 9-BIT HOLD REGISTER Motorola
MC100E101 Quad 4-Input OR/NOR Gate Motorola
MC100E104 QUINT 2-INPUT AND/NAND GATE Motorola

Other Datasheets by onsemi

Part Number Description
MC100E142 9-BIT SHIFT REGISTER
MC100E143 9-BIT HOLD REGISTER
MC100E101 QUAD 4-INPUT OR/NOR GATE
MC100E104 QUINT 2-INPUT AND/NAND GATE
MC100E107 QUINT 2-INPUT XOR/XNOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com MC10E141, MC100E141 5V ECL 8-Bit Shift Register Description The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0 − D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated. The select pins, SEL0 and SEL1, select one of four modes of operation: Load, Hold, Shift Left, Shift Right, according to the Function Table. Input data is accepted a set-up time before the positive clock edge.