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MC100E451 - 6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK

General Description

single-ended outputs and differential data inputs.

The common clock input is also differential.

The registers are triggered by a positive transition of the positive clock (CLK) input.

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Datasheet Details

Part number MC100E451
Manufacturer onsemi
File Size 147.11 KB
Description 6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK
Datasheet download datasheet MC100E451 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10E451, MC100E451 5 V ECL 6-Bit D Register Differential Data and Clock Description The MC10E/100E451 contains six D-type flip-flops with single-ended outputs and differential data inputs. The common clock input is also differential. The registers are triggered by a positive transition of the positive clock (CLK) input. A HIGH on the Master Reset (MR) input resets all Q outputs to LOW. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the D and the CLK sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state.