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MC100EP016A - 3.3V ECL 8-Bit Synchronous Binary Up Counter

Datasheet Summary

Description

The MC100EP016A is a high speed synchronous, presettable, cascadeable 8

bit binary counter.

Architecture and operation are the same as the ECLinPS™ family MC100E016 with higher operating speed.

Features

  • internal feedback to TC gated by the TCLD (Terminal Count Load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all.
  • one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate prop.

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Datasheet Details

Part number MC100EP016A
Manufacturer ON Semiconductor
File Size 260.37 KB
Description 3.3V ECL 8-Bit Synchronous Binary Up Counter
Datasheet download datasheet MC100EP016A Datasheet
Additional preview pages of the MC100EP016A datasheet.

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Full PDF Text Transcription

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3.3 V ECL 8-Bit Synchronous Binary Up Counter MC100EP016A Description The MC100EP016A is a high−speed synchronous, presettable, cascadeable 8−bit binary counter. Architecture and operation are the same as the ECLinPS™ family MC100E016 with higher operating speed. The counter features internal feedback to TC gated by the TCLD (Terminal Count Load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pulldowns), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all−one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate properly.
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