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MC100EP14 - ECL/PECL/HSTL Clock Driver

Datasheet Summary

Description

The MC100EP14 is a low skew 1 to

clock distribution in mind, accepting two clock sources into an input multiplexer.

ended (if the VBB output is used).

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Datasheet Details

Part number MC100EP14
Manufacturer ON Semiconductor
File Size 80.80 KB
Description ECL/PECL/HSTL Clock Driver
Datasheet download datasheet MC100EP14 Datasheet
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MC100EP14 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver Description The MC100EP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The EP14 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated even if only one output is being used.
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